.section .text.vectors, "ax"

/* system vector for EL1 */
.globl system_vectors
system_vectors:
.align 11
    .set    VBAR, system_vectors
    .org    VBAR
    // Exception from CurrentEL (EL1) with SP_EL0 (SPSEL=0)
    .org (VBAR + 0x00 + 0)
    B vector_not_implement          // Synchronous
    .org (VBAR + 0x80 + 0)
    B vector_not_implement          // IRQ/vIRQ
    .org (VBAR + 0x100 + 0)
    B vector_not_implement          // FIQ/vFIQ
    .org (VBAR + 0x180 + 0)
    B vector_not_implement          // SError/vSError

    // Exception from CurrentEL (EL1) with SP_ELn
    .org (VBAR + 0x200 + 0)
    B vector_exception              // Synchronous
    .org (VBAR + 0x280 + 0)
    B vector_irq                    // IRQ/vIRQ
    .org (VBAR + 0x300 + 0)
    B vector_fiq                    // FIQ/vFIQ
    .org (VBAR + 0x380 + 0)
    B vector_not_implement          // SError/vSError

    // Exception from lower EL (EL0), aarch64
    .org (VBAR + 0x400 + 0)
    B vector_not_implement          // Synchronous
    .org (VBAR + 0x480 + 0)
    B vector_not_implement          // IRQ/vIRQ
    .org (VBAR + 0x500 + 0)
    B vector_not_implement          // FIQ/vFIQ
    .org (VBAR + 0x580 + 0)
    B vector_not_implement          // SError/vSError

    // Exception from lower EL (EL0), aarch32
    .org (VBAR + 0x600 + 0)
    B vector_not_implement          // Synchronous
    .org (VBAR + 0x680 + 0)
    B vector_not_implement          // IRQ/vIRQ
    .org (VBAR + 0x700 + 0)
    B vector_not_implement          // FIQ/vFIQ
    .org (VBAR + 0x780 + 0)
    B vector_not_implement          // SError/vSError

.section .text, "ax"

.weak vector_exception
vector_exception:
    b .

.weak vector_irq
vector_irq:
    b .

.weak vector_fiq
vector_fiq:
    b .

.weak vector_not_implement
vector_not_implement:
    b .
